The image you shared provides a detailed explanation on how NAND and NOR gates are universal gates. Let's break down the key concepts demonstrated:

1. NAND as a NOT Gate:

A NAND gate can be configured to behave as a NOT gate. This is achieved by connecting both inputs of the NAND gate to the same signal (A), which inverts the input. The table shows the behavior of the NOT function:

• When A = 0, Y = 1
• When A = 1, Y = 0 Thus, NAND can function as a NOT gate.

2. NAND as an AND Gate:

By using a combination of NAND gates, we can simulate the behavior of an AND gate. The image shows the logic circuit and truth table:

• When both A and B = 0, the output is 0
• When A = 0, B = 1 or A = 1, B = 0, the output is 0
• When both A and B = 1, the output is 1 This shows that NAND gates can be used to replicate AND logic.

3. NAND as an OR Gate:

A combination of NAND gates can also function as an OR gate. The output behaves as follows:

• When both A and B = 0, the output is 0
• When A = 0, B = 1 or A = 1, B = 0, the output is 1
• When both A and B = 1, the output is 1 Thus, NAND gates can also simulate the OR function.

4. NOR as a NOT Gate:

The NOR gate can be configured to act as a NOT gate. This is done by applying the same input to both inputs of the NOR gate (A). The output will be the inversion of A:

• When A = 1, Y = 0
• When A = 0, Y = 1

5. NOR as an OR Gate:

NOR gates can simulate an OR gate when combined in a specific manner. The truth table shows:

• When A = 0, B = 0, the output is 0
• When A = 0, B = 1 or A = 1, B = 0, the output is 1
• When A = 1, B = 1, the output is 1

6. NOR as an AND Gate:

Similarly, NOR gates can function as an AND gate with the correct configuration. The output behaves as follows: